1. Field of the Invention
This invention relates generally to a reference biasing voltage circuits. More particularly, this invention relates to PTAT (proportional to absolute temperature) biasing circuit and to bandgap voltage reference circuits incorporating a PTAT biasing circuit. Even more particularly, this invention relates to start circuitry for the initiation of PTAT (proportional to absolute temperature) biasing circuits.
2. Description of Related Art
The design of a bandgap referenced voltage source circuits is well known in the art. These circuits are designed to provide a voltage reference that is independent of changes in temperature of the circuit.
The reference voltage of a bandgap referenced voltage source is a function of the voltage developed between the base and emitter Vbe of a one bipolar junction transistor (bipolar transistor) and the difference between of the base-emitter voltage Vbe of two other bipolar transistors (ΔVbe). The base-emitter voltage Vbe of the first bipolar transistor has a negative temperature coefficient or the change in the base-emitter voltage Vbe will be decrease as the temperature increases. The differential voltage of the two other bipolar transistors ΔVbe will have a positive temperature coefficient, which means that the differential base-emitter voltage ΔVbe will increase as the temperature increases. The reference voltage of the temperature independent bandgap voltage referenced voltage source is adjusted by scaling the differential base-emitter voltage ΔVbe and summing it with the base-emitter voltage Vbe of the first bipolar transistor.
Referring now to FIG. 1 to understand an implementation of a bandgap referenced voltage source circuit 5 of prior art as described in Design of Analog Integrated Circuits, Razavi, 2001, McGraw-Hill, New York, N.Y., pp.: 377–381. A PTAT (proportional to absolute temperature) biasing circuit 10 provides a PTAT biasing voltage at the node n3 which is added in the CTAT (complementary to absolute temperature) voltage of a base-emitter voltage Vbe of the first bipolar transistor to generate the bandgap referenced voltage VBGR.
The PTAT biasing circuit 10 includes a pair of diode connected PNP bipolar transistors Q1 and Q2. The bases and collectors of the PNP bipolar transistors Q1 and Q2 are connected to the substrate biasing voltage source Vss. The emitter of the PNP bipolar transistor Q1 is connected to the drain of a p-type Metal Oxide Semiconductor (MOS) transistor MP1. The source of the MOS transistor MP1 is connected to the power supply voltage source VDD. The emitter of the PNP bipolar transistor Q2 is connected to a bottom terminal of a resistor R1. The top terminal of the resistor R1 is connected to a drain of the p-type MOS transistor MP2. The source of the MOS transistor MP2 is connected to the power supply voltage source VDD.
The gates of the MOS transistors MP1 and MP2 are commonly connected to the output of the operational amplifier OA1 and form the node n3 that provides the PTAT biasing voltage. The inverting input (−) of the operational amplifier OA1 is connected to the connection of the drain of the MOS transistor MP1 and the emitter of the PNP bipolar transistor Q1. The noninverting input (+) of the operational amplifier OA1 is connected to the connection of the top terminal of the resistor R1 and the drain of the MOS transistor MP2.
The MOS transistors MP1 and MP2 form current mirrors to generate the currents Iq1 and Iq2 that are the emitter currents of the diode connected PNP bipolar transistors Q1 and Q2. The MOS transistors MP1 and MP2 are equal in size such that the currents Iq1 and Iq2 are equal. Since the diode connected PNP bipolar transistors Q1 and Q2 are scaled such that the size of the diode connected PNP bipolar transistors Q1 and Q2 have a ratio respectively of 1:M. M is a scaling factor used to determine the PTAT biasing voltage. Thus it can be shown that the current Iq2 is determined by the equation:Iq2=(kT/q)*(In(M)/R1)                where                    k is Boltzman's constant.            T is absolute temperature.            q is the charge of an electron.            M is the scaling factor of the diode connected PNP bipolar transistors Q1 and Q2.            R1 is the resistance of the resistor R1.                        
The difference in voltages present at the nodes n1 and n2 are equal to the differential base-emitter voltage (ΔVbe) between the base-emitter voltage Vbe diode connected PNP bipolar transistors Q1 and Q2. The differential base-emitter voltage ΔVbe is amplified by the operational amplifier OA1 to generate the PTAT biasing voltage.
The PTAT biasing voltage is the input to the summing circuit 15 that effectively adds the PTAT biasing voltage with a base-emitter Vbe voltage of a diode connected PNP bipolar transistor. The summing circuit 15 includes the diode connected PNP bipolar transistor Q3. The base and collector of the diode connected PNP bipolar transistor Q3 is connected to the substrate biasing voltage source Vss. The emitter of the diode connected PNP bipolar transistor Q3 is connected to the bottom terminal of the resistor R2. The top terminal of the resistor R2 is connected to the drain of the MOS transistor MP3 that forms a current mirror with the MOS transistors MP1 and MP2 of the PTAT biasing circuit 10. The source of the MOS transistor MP3 is connected to the power supply voltage source VDD. The gate of the MOS transistor MP3 is connected to receive the PTAT biasing voltage from the PTAT biasing circuit 10. The current Iq3 is forced to be equal to the currents Iq1 and Iq2. It can be shown that the bandgap referenced voltage VBGR is determined by the equation:VBGR=Vbe3+(kT/q)*(In(M)*R2/R1)                where                    Vbe3 is the voltage developed between the base and the emitter of the diode connected PNP bipolar transistor Q3.            k is Boltzman's constant.            T is absolute temperature.            q is the charge of an electron.            M is the scaling factor of the diode connected PNP bipolar transistors Q1 and Q2.            R1 is the resistance of the resistor R1.            R2 is the resistance of the resistor R2.                        
It is known that the voltage Vbe3 developed between the base and the emitter of the diode connected PNP bipolar transistor Q3 has a negative temperature coefficient and the PTAT biasing voltage has a positive temperature coefficient from the kT/q, commonly referred as the voltage equivalent of temperature.
It is further known that the voltage Vbe3 developed between the base and the emitter of the diode connected PNP bipolar transistor Q3 varies with temperature at a rate of −1.5 mV/° K. The voltage equivalent of temperature (kT/q) varies with temperature at a rate of +0.087 mV/° K. The scaling factor (M) and the resistance of the resistors R1 and R2 is then chosen such that the temperature coefficient of the bandgap referenced voltage source circuit 5 is essentially zero.
When the power supply voltage source VDD is deactivated the gate to source voltages of the MOS transistors MP1 and MP2 and the currents Iq1 and Iq2 are zero. When the power supply voltage source VDD is activated, the MOS transistors MP1 and MP2 and the node n3 is forced to the level of the power supply voltage source VDD. This forces the MOS transistor MP3 and thus the current Iq3 to be zero. This is a degenerate bias point causing a malfunction of the bandgap referenced voltage source circuit 5. Referring to FIG. 2, the desired normal operating point occurs when the drain currents IDS of the MOS transistors MP1 and MP2 and the gate to source voltages VGS to be non-zero. The degenerate operating point as explained above occurs when the drain currents IDS of the MOS transistors MP1 and MP2 and the gate to source voltages VGS are zero.
A solution of this problem is the addition of a start-up circuit 20 as shown in FIG. 3. The start-up sub-circuit 20 has a diode connected MOS transistor MP4. The drain and source of the MOS transistor MP4 are commonly connected to form the cathode of the diode. The anode of the diode is the source of the MOS transistor MP4 connected to the power supply voltage source. The start-up circuit 20 has a MOS transistor MP5 that has is source connected to the gate and drain of the diode connected MOS transistor MP4. The drain of the MOS transistor MP5 is connected to the node n1 of the PTAT biasing circuit 10. The gate of the MOS transistor MP5 is connected to a power-up indication signal PU. The power-up indication signal PU is activated when the power supply voltage source VDD has reached a threshold level after the power supply voltage source VDD has been made active. Prior to the activation of the power-up indication signal PU, the drain of the MOS transistor MP5 is at approximately the voltage level of the power supply voltage source VDD less the voltage drop accross of the of the diode connected MOS transistor MP4. This causes the voltage at the node n1 to be non-zero and thus the gate to source voltage of the MOS transistor MP1 to be non-zero allowing the node n3 to become the PTAT biasing voltage and the normal bias point of FIG. 2.
FIGS. 4 and 5 shows plots of the voltages showing the operation conditions of the bandgap referenced voltage source circuit 5. When the voltage of the power supply voltage source VDD begins to rise upon activation, the voltage at the node n1 becomes non-zero since the MOS transistor MP5 is turned on. This causes the node n3 to increase dramatically causing the node n2 to become non-zero. This forces the bandgap referenced voltage VBGR to rise, but not to the steady state controlled voltage. The voltage at the node n1 is not set to the base-emitter voltage of the diode connected PNP bipolar transistor Q1 as long as the start-up sub-circuit 20 is active. When the power-up indication signal PU has reached the threshold (generally about 90% of the power supply voltage source VDD), the nodes n1, n2, and n3 reach their steady state values and the bandgap referenced voltage VBGR reaches its steady state voltage. Referring to FIG. 5, having to wait for the power-up indication signal PU to activate causes a delay t1 in the time when the bandgap referenced voltage source circuit 5 is providing the bandgap reference voltage VBGR.
“A Bandgap Voltage Reference Using Digital CMOS Process” Vermaas et al., Proceedings—1998 IEEE International Conference on Electronics, Circuits and Systems, 1998, pp.: 303–306 vol. 2 describes some issues and criteria for the design of a bandgap voltage reference. In particular voltage reference architecture, characteristics of the operational amplifier, parasitic bipolar transistor biasing currents and the start-up sub-circuit are described.
“The Design of Band-Gap Reference Circuits: Trials and Tribulations” Pease, Proceedings of the 1990 Bipolar Circuits and Technology Meeting, 1990, pp.: 214–218 is tutorial that discusses the designs of various band-gap references, particularly, start-up circuits.
U.S. Pat. No. 4,839,535 (Miller) discusses a bandgap voltage reference. The reference is generated by a MOS current source sourcing current to two substrate bipolar transistors operating at different current densities and operated as emitter followers. A pair of MOS current mirrors sink current from the two bipolar transistors. A start-up circuit initializes the circuit upon application of supply voltages. An output stage multiplies the bandgap reference voltage to the desired output voltage level. A feedback stage improves the accuracy of the output voltage by adjusting the current in the reference circuit.
U.S. Pat. No. 5,087,830 (Cave, et al.) describes a start-up circuit for a bandgap reference cell using CMOS transistors including a transistor connected between the bandgap reference cell and a differential amplifier in the feedback path. The transistor creates an offset voltage in the bandgap reference cell when power is first applied. The offset insures the correct operation of the bandgap reference cell, and to turn off after correct operation has been achieved.
U.S. Pat. No. 5,545,978 (Pontius) teaches a bandgap reference generator having regulation and kick-start circuits. The bandgap reference generator includes a bandgap reference circuit and a voltage regulation circuit coupled to bandgap reference circuit. The voltage regulation circuit operates to supply power to the bandgap reference circuit such that the voltages at a first internal control node and a second internal control node are equal. Kick-start circuits for the voltage regulation circuit and the bandgap reference circuit are also included within the bandgap reference generator.
U.S. Pat. No. 5,610,506 (McIntyre) provides a bandgap reference circuit which generates a reference voltage which is always at least as high as a stable reference value. This is done by generating a lock signal which is maintained at a first logic level during start-up of the reference circuit and then attains a second logic level when the reference value has stabilized.
U.S. Pat. No. 6,084,388 (Toosky) describes a low power start-up circuit for bandgap voltage reference. The start-up circuit may achieve lower current requirements by reducing the current of the start-up circuit to approximately zero when the bandgap circuit reaches a predetermined value.
U.S. Pat. No. 6,133,719 (Maulik) provides a start-up circuit for a bandgap reference. An amplifier is configured in a differential arrangement as the bandgap reference. A start-up circuitry ensures that a second input node is maintained at a lower voltage than a first input node of the amplifier at start-up, when the output node corresponding to the second input side of the amplifier is also pulled low.
U.S. Pat. No. 6,335,614 (Ganti) teaches a bandgap reference voltage circuit with a start-up circuit that initiates operation of a bandgap reference circuit. The start pulse circuit provides a start pulse when the bandgap circuit is powered up. A transistor receives the pulse as an input, and applies the pulse to a regenerative bandgap reference circuit. The bandgap reference circuit output voltage is forced above a normal output voltage, producing a feedback current through the bandgap reference circuit, providing a current level which exceeds the normal stable operating level and output voltage level range. When the pulse ceases, the regenerative bandgap reference circuit output voltage decreases to its normal stable value, and the regenerative bandgap reference circuit is placed in its normal stable operating state.
U.S. Pat. No. 6,392,470 (Burstein, et al.) describes a bandgap reference transitioning circuit. The bandgap reference transitioning circuit includes a supply-independent biasing circuit that is electrically connected to a start-up circuit and supports the start-up circuit's ability to cause a bandgap reference circuit to transition to its operational mode for any supply voltage that supports the bandgap reference circuit's operational mode.
U.S. Pat. No. 6,509,726 (Roh) provides an amplifier for a bandgap reference circuit having a built-in start-up circuit. The bandgap reference circuit includes at least one transistor, an amplifier and a start-up circuit. The amplifier is coupled to the transistor(s) to establish a bandgap reference voltage. The start-up circuit, in response to the bandgap reference circuit powering up, isolates an output terminal of the amplifier from at least one input terminal of the amplifier and supplies power to the transistor(s) via the output terminal.
U.S. Pat. No. 6,566,850 (Heinrich) illustrates a low-voltage, low-power bandgap reference circuit with bootstrap current. The bandgap reference generator includes a bandgap reference circuit, a sensing circuit, and a current injector circuit. The sensing circuit is coupled to the bandgap reference circuit for sensing a first voltage at a first internal node of the bandgap reference circuit. The current injection circuit is responsive to the sensing circuit for injecting bootstrap current into a second internal node until the first voltage reaches a threshold voltage. The current injection circuit is operative to inject the bootstrap current into the second internal node during an initial condition of the bandgap reference circuit to cause the bandgap reference circuit to quickly transition to a desired operating state. The injection of bootstrap current is discontinued when the second voltage reaches the threshold voltage reflecting that the desired operating state is achieved.
U.S. Pat. No. 6,642,776 (Micheloni, et al.) describes a bandgap voltage reference circuit. The bandgap voltage reference circuit includes a low power consumption bandgap circuit and short start-up time a bandgap circuit. The short start-up time bandgap circuit supplies the output reference voltage until the low power consumption bandgap circuit until it becomes stabilized at which time the short start-up time bandgap circuit is turned off.
U.S. Pat. No. 6,710,641 (Yu, et al.) describes a bandgap reference circuit that operates with a voltage supply that can be less than 1 volt and that has one stable, non-zero current operating point. The core has a current generator embedded within it and includes one operational amplifier that provides a self-regulated voltage for several transistors used in the circuit.
U.S. Pat. No. 6,737,908 (Mottola, et al.) teaches a bootstrap reference circuit including a shunt bandgap regulator with external start-up current source. The bootstrap reference circuit includes a shunt regulator for generating a reference voltage at a first node, a current source generating a current, and a current mirror coupling the current to the shunt regulator for supplying the shunt regulator. In operation, when the shunt regulator is powering up, the current has an increasing magnitude when a voltage at the first node is less than a predefined voltage value where the predefined voltage value is less than the reference voltage.
U.S. Patent Application 2002/0125937 Park, et al. illustrates a bandgap reference voltage circuit having a bandgap start-up circuit for initiating operation of the bandgap reference voltage circuit. The bandgap start-up circuit is connected to a low impedance leg in the bandgap core circuit and the bandgap output circuit has a feedback circuit that is connected to a high impedance leg in the bandgap core circuit. The connection of the bandgap start-up circuit to the low impedance leg of the bandgap core circuit eliminates the possibility of metastable operation of the bandgap reference voltage circuit.
U.S. Patent Application 2003/0080806 (Sugimura) provides a bandgap reference voltage circuit. The bandgap voltage circuit includes a constant-current circuit, a reference voltage output circuit that generates a reference voltage according to the constant current, a power supply voltage detection circuit, and a start-up output circuit. The start-up output circuit supplies a starting potential to a node in the constant-current circuit until the power supply voltage detection circuit detects that the power supply has reached a voltage sufficient for the constant-current circuit to maintain operation.
U.S. Patent Application 2003/0201822 (Kang, et al.) describes a fast start-up low-voltage bandgap voltage reference circuit. The fast start-up low-voltage bandgap voltage reference circuit optionally has a starting circuit added to the bandgap voltage reference circuit to increase the steadiness when starting.